Extending Chip Lifetime with Safer Voltage Scaling

Abstract

With the demand for longer-lasting chips growing across industries, designers and reliability engineers face increasing pressure to ensure their products perform correctly for the expected lifetime. Application stress is one of the key contributors to chip degradation over the years, as performance under demanding workloads leads to increased power consumption, higher temperatures, greater reliability risks, and eventually, reduced product lifespan.

proteanTecs AVS Pro™ presents an innovative approach to workload-aware and reliability-aware adaptive voltage scaling that is much safer than traditional methods. Therefore, it enables the use of fewer guard bands (i.e., reclaiming unutilized guard bands), to safely reduce power and significantly extend the lifespan of chips.

This paper explores how proteanTecs AVS Pro prevents unnecessary degradation, delaying the onset of wear-out and critical failures by fine-tuning the voltage throughout the chip's life, and at the same time reduces the power consumption without performance impact.

This paper highlights:

• How various workload demands and operational stresses contribute to chip aging and shortened lifespans
• How proteanTecs AVS Pro™ employs a safer, reliability-aware approach to voltage scaling, enabling reduced voltage guard bands and lower power consumption
• How real-time in-chip monitoring of timing margins enables more precise and dynamic adjustments, delaying wear-out and ensuring long-term reliability
• The potential for significant CAPEX savings and sustainability benefits, particularly for hyperscalers, by extending server lifetimes
• Practical results from industries like Datacenter and Automotive, where longer-lasting chips align with strategic goals such as reduced replacements and enhanced safety requirements
• Real-world examples demonstrating up to 18% SoC lifetime extension

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